Local interconnect structures are used to electrically connect different transistors fabricated on a common substrate. Typically, first and second metallization layers are used to make these electrical contacts between certain regions of the wafer. However, with nanowire devices, this significantly limits density scaling since one is limited by middle-of-line (MOL) wiring density and not by active nanowire density.
Specifically, the first and second metallization layers seriously limit the density of integrated circuits. For instance, metal layers are often used to connect gates in a cross couple configuration which significantly limits density scaling due to constraints on first metal layer patterning.
Hence, a need exists to solve the local interconnect density problem to insure continuous scaling.